Joseph Doherty
1a2856526a
Comments described the *history* of how the code arrived (phase numbers, wave IDs, review IDs, dated TODOs) instead of what it does today. That scaffolding rotted as the codebase evolved. Cleaned 60 source files + .gitignore; behaviour unchanged (387/387 tests still pass). Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
27 lines
1.3 KiB
C#
27 lines
1.3 KiB
C#
using Mbproxy.Proxy.Multiplexing;
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namespace Mbproxy.Proxy.Cache;
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/// <summary>
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/// Hash key for the per-PLC <see cref="ResponseCache"/>. Structurally identical to
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/// the read-coalescing <see cref="CoalescingKey"/> — both keys discriminate the same
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/// dimensions (UnitId, FunctionCode, StartAddress, Quantity), but the two type aliases
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/// live in different namespaces so the cache and the coalescer can evolve independently
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/// without one shaping the other's API surface.
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///
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/// <para><b>Equality semantics:</b> record-struct value equality. FC03 and FC04 produce
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/// different keys for the same address (different Modbus tables); different
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/// <see cref="UnitId"/> bytes never share a key (different PLC personalities behind a
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/// shared socket); reads of different <see cref="Qty"/> never share a key (the responses
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/// carry different register counts and would not be interchangeable on a fan-out).</para>
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///
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/// <para><b>Scope:</b> only FC03 (Read Holding Registers) and FC04 (Read Input Registers)
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/// are cacheable. FC06 / FC16 writes invalidate cache entries by ADDRESS RANGE OVERLAP
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/// rather than exact-key match — see <see cref="CacheInvalidator"/>.</para>
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/// </summary>
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internal readonly record struct CacheKey(
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byte UnitId,
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byte Fc,
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ushort StartAddress,
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ushort Qty);
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