a25593a9c6
Group all 69 projects into category subfolders under src/ and tests/ so the Rider Solution Explorer mirrors the module structure. Folders: Core, Server, Drivers (with a nested Driver CLIs subfolder), Client, Tooling. - Move every project folder on disk with git mv (history preserved as renames). - Recompute relative paths in 57 .csproj files: cross-category ProjectReferences, the lib/ HintPath+None refs in Driver.Historian.Wonderware, and the external mxaccessgw refs in Driver.Galaxy and its test project. - Rebuild ZB.MOM.WW.OtOpcUa.slnx with nested solution folders. - Re-prefix project paths in functional scripts (e2e, compliance, smoke SQL, integration, install). Build green (0 errors); unit tests pass. Docs left for a separate pass. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
78 lines
3.3 KiB
JSON
78 lines
3.3 KiB
JSON
{
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"_comment": "s7_1500.json -- Siemens SIMATIC S7-1500 + MB_SERVER quirk simulator. Models docs/v2/s7.md behaviors as concrete register values. Unlike DL260 (CDAB word order default) or Mitsubishi (CDAB default), S7 MB_SERVER uses ABCD word order by default because Siemens native CPU types are big-endian top-to-bottom both within the register pair and byte pair. This profile exists so the driver's S7 profile default ByteOrder.BigEndian can be validated end-to-end. pymodbus bit-address semantics are the same as dl205.json (FC01/02/05/15 address X maps to cell index X/16); seed bits at the appropriate cell-indexed positions.",
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"server_list": {
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"srv": {
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"comm": "tcp",
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"host": "0.0.0.0",
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"port": 5020,
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"framer": "socket",
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"device_id": 1
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}
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},
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"device_list": {
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"dev": {
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"setup": {
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"co size": 4096,
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"di size": 4096,
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"hr size": 4096,
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"ir size": 1024,
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"shared blocks": true,
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"type exception": false,
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"defaults": {
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"value": {"bits": 0, "uint16": 0, "uint32": 0, "float32": 0.0, "string": " "},
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"action": {"bits": null, "uint16": null, "uint32": null, "float32": null, "string": null}
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}
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},
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"invalid": [],
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"write": [
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[0, 0],
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[25, 25],
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[100, 101],
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[200, 209],
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[300, 301]
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],
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"uint16": [
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{"_quirk": "DB1 header marker. On an S7-1500 with MB_SERVER pointing at DB1, operators often reserve DB1.DBW0 for a fingerprint word so clients can verify they're talking to the right DB. 0xABCD = 43981.",
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"addr": 0, "value": 43981},
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{"_quirk": "Scratch HR range 200..209 -- mirrors the standard.json scratch range so the smoke test (S7_1500Profile.SmokeHoldingRegister=200) round-trips identically against either profile.",
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"addr": 200, "value": 0},
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{"addr": 201, "value": 0},
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{"addr": 202, "value": 0},
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{"addr": 203, "value": 0},
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{"addr": 204, "value": 0},
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{"addr": 205, "value": 0},
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{"addr": 206, "value": 0},
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{"addr": 207, "value": 0},
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{"addr": 208, "value": 0},
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{"addr": 209, "value": 0},
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{"_quirk": "Float32 1.5f in ABCD word order (Siemens big-endian default, OPPOSITE of DL260 CDAB). IEEE-754 1.5 = 0x3FC00000. ABCD = high word first: HR[100]=0x3FC0=16320, HR[101]=0x0000=0.",
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"addr": 100, "value": 16320},
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{"_quirk": "Float32 1.5f ABCD low word.",
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"addr": 101, "value": 0},
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{"_quirk": "Int32 0x12345678 in ABCD word order. HR[300]=0x1234=4660, HR[301]=0x5678=22136. Demonstrates the contrast with DL260 CDAB Int32 encoding.",
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"addr": 300, "value": 4660},
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{"addr": 301, "value": 22136}
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],
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"bits": [
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{"_quirk": "Coil bank marker cell. S7 MB_SERVER doesn't fix coil addresses; this simulates a user-wired DB where coil 400 (=bit 0 of cell 25) represents a latched digital output. Cell 25 bit 0 = 1 proves the wire-format round-trip works for coils on S7 profile.",
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"addr": 25, "value": 1},
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{"_quirk": "Discrete-input bank marker cell. DI 500 (=bit 0 of cell 31) = 1. Like coils, discrete inputs on S7 MB_SERVER are per-site; we assert the end-to-end FC02 path only.",
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"addr": 31, "value": 1}
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],
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"uint32": [],
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"float32": [],
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"string": [],
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"repeat": []
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}
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}
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}
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