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Phase 3 PR 48 -- DL205 CDAB float word order end-to-end test #47

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dohertj2 merged 1 commits from phase-3-pr48-dl205-cdab-float into v2 2026-04-18 22:13:40 -04:00
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dohertj2 commented 2026-04-18 22:13:35 -04:00
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Summary

Stacked on PR 47. Integration-test-only PR: validates ModbusByteOrder.WordSwap (CDAB) for Float32 end-to-end against the pymodbus dl205 profile. The word-swap code path has existed since PR 24; this locks it in against a realistic PLC payload so future codec refactors can't silently break DL205/DL260 floats.

  • HR[1056..1057] stores IEEE-754 1.5f as CDAB (low word 0x0000 first, high word 0x3FC0 second).
  • With WordSwap the read returns 1.5f; with BigEndian it returns a tiny denormal.
  • Test asserts both to prove the flag is not a no-op.

Validation

  • No driver code changes
  • 6/6 DL205 integration tests pass

Test plan

  • WordSwap decodes 1.5f
  • BigEndian decode on same wire != 1.5f
  • Regression safety net for DL205/DL260 CDAB codec
## Summary Stacked on PR 47. Integration-test-only PR: validates `ModbusByteOrder.WordSwap` (CDAB) for `Float32` end-to-end against the pymodbus dl205 profile. The word-swap code path has existed since PR 24; this locks it in against a realistic PLC payload so future codec refactors can't silently break DL205/DL260 floats. - HR[1056..1057] stores IEEE-754 `1.5f` as CDAB (low word `0x0000` first, high word `0x3FC0` second). - With `WordSwap` the read returns `1.5f`; with `BigEndian` it returns a tiny denormal. - Test asserts both to prove the flag is not a no-op. ## Validation - No driver code changes - 6/6 DL205 integration tests pass ## Test plan - [x] WordSwap decodes 1.5f - [x] BigEndian decode on same wire != 1.5f - [x] Regression safety net for DL205/DL260 CDAB codec
dohertj2 added 1 commit 2026-04-18 22:13:36 -04:00
Phase 3 PR 48 -- DL205 CDAB word order for Float32 end-to-end test. The driver has supported ModbusByteOrder.WordSwap (CDAB) since PR 24 for all multi-register types -- the underlying word-swap code path was already there. PR 48 closes the loop with an integration test that validates it end-to-end against the dl205 pymodbus profile: HR[1056..1057] stores IEEE-754 1.5f with the low word at the lower address (0x0000 at HR[1056], 0x3FC0 at HR[1057]). Reading with WordSwap returns 1.5f; reading with BigEndian returns a tiny denormal (~5.74e-41) -- a silent "value is 0" bug that typically surfaces in the field only when an operator notices a setpoint readout stuck at 0 while the PLC display shows the real value. Test asserts both: WordSwap==1.5f AND BigEndian!=1.5f, proving the flag is not a no-op. No driver code changes -- the word-swap normalization at NormalizeWordOrder() has handled Float32/Int32/UInt32 correctly since PR 24 and the unit test suite already covers it (Int32_WordSwap_decodes_CDAB_layout + Float32 equivalent). This PR exists primarily to lock in the integration-level validation so future refactors of the codec don't silently break DL205/DL260 floats. 6/6 DL205 integration tests pass with MODBUS_SIM_PROFILE=dl205. 463c5a4320
dohertj2 merged commit f306793e36 into v2 2026-04-18 22:13:40 -04:00
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Reference: dohertj2/lmxopcua#47
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