test(ab): hw4 evidence - mixed MSP read (#582), listing order (#572) on the press; AbLegacy bit-write test; gate-results + docs
Claude-Session: https://claude.ai/code/session_01Ef2ozxS7QPanGT8uoATbTe
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@@ -237,17 +237,20 @@ The driver has two interchangeable wire transports, selected by one `DriverConfi
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## Known gaps
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- ⚠️ **Native writes are verified against `ab_server` only (simulator-only), never a real controller.** The
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real-press gate (Task 21) was **read-only**: it proved native reads, browse and templates on Z-35162
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(2026-10-08) and nothing else. Results:
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- ⚠️ **Native hardware evidence is narrow.** The read-only real-press gate (Task 21, 2026-10-08) proved native reads, browse
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and templates on Z-35162; a user-approved one-off on 2026-10-09 added **scalar native writes on a real CompactLogix**
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(DINT `test2`, BOOL `Program:UN01_Press.xxtest`, REAL `Program:ES03_EM03_Zone3._ff_test`: write, read back, restore, all
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Good). Still ab_server-only: array, STRING and UDT-member writes and fragmented writes. Mixed STRING/array/scalar
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Multiple Service Packet reads (#582) are proven on the press (one 5-read MSP, values equal to single reads). Results:
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[native-ab-transport-gate-results](../plans/2026-10-07-native-ab-transport-gate-results.md).
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- **libplctag cannot be deleted** until a bench controller allows write verification.
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- ⚠️ RESIDUAL (#567): wide-struct **fragmented writes** (8-byte alignment) are unit-tested only. Production
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presses are read-only and there is no bench controller, so this cannot be proven; it stays open until a
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bench controller exists.
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- Native browse (#572, resolved in code): listing paging no longer assumes ascending instance order, pages
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are paced, and a browse's template reads share one lease. One residual: whether a real controller ever
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lists a page out of order is unobserved — the reader is now correct either way. `browsePageDelayMs` is an AdminUI driver-form field ("Browse page delay (ms)", #596); keys the form does not model are preserved on save (#576).
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are paced, and a browse's template reads share one lease. Observed on Z-35162 (2026-10-09, 41
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pages / 3162 tags): every page strictly ascending, so out-of-order listing has never been seen on a real controller — the
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reader is correct either way. `browsePageDelayMs` is an AdminUI driver-form field ("Browse page delay (ms)", #596); keys the form does not model are preserved on save (#576).
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- Micro800, routed and `logixpccc` paths are covered by `ab_server` only. The Micro800 profile passes
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natively. The AbLegacy default excludes `logixpccc` (and PLC-5).
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- Follow-up issues for this workstream: #564 to #577.
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@@ -219,6 +219,7 @@ Everything below is against the `ab_server` simulator; no real PCCC controller h
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| F-file read (`F8`) | one capture, `slc500-read-f8` (codec parity only; no native F write on a wire) |
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| S (incl. the default probe `S:0`), B, T, C, R, L, ST, A, O, I | **none** — encoded from the PCCC file-type table |
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| MicroLogix function files (RTC/HSC/...), PLC-5 octal I/O | **none** — parsed only; native refuses function files as Unsupported |
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| Bit-within-word write (`B3:0/5`) | `ab_server` SLC500 + MicroLogix, both transports (`AbLegacyBitWriteTests`): the driver RMWs the parent word, only the addressed bit changes. PLC-5 native refuses it (`BadNotSupported`, #571) |
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| Indirect addressing (`N7:[N7:0]`) | `ab_server` N-file, both transports (#646) - resolved by the driver, the transport sees the composed address |
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| T/C/R sub-elements (`.PRE`/`.ACC`/`.LEN`/`.POS`), 6-byte T/C/R element layout | **none** |
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