@@ -38,6 +38,16 @@ quirk. UDT / alarm / quirk behavior is verified only by unit tests with
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- `--plc controllogix` and `--plc compactlogix` mode dispatch.
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- The skip-on-missing-binary behavior (`AbServerFactAttribute`) so a fresh
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clone without the simulator stays green.
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- **Symbolic vs Logical addressing wall-clock** (PR abcip-3.2,
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`AbCipAddressingModeBenchTests`) — both modes complete + emit timing.
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**Emulate-tier only**: `ab_server` does not currently honour the CIP Symbol
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Object class 0x6B `cip_addr` attribute that Logical mode sets, so on the
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fixture the two modes measure the same wire path. The bench scaffold
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asserts both complete + records timing for human inspection; the actual
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Symbolic-vs-Logical perf comparison requires a real ControlLogix /
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CompactLogix on the network. See
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[`docs/drivers/AbCip-Performance.md`](AbCip-Performance.md) §"Addressing
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mode" for the full caveat.
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## What it does NOT cover
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