{
  "_comment": "s7_1500.json -- Siemens SIMATIC S7-1500 + MB_SERVER quirk simulator. Models docs/v2/s7.md behaviors as concrete register values. Unlike DL260 (CDAB word order default) or Mitsubishi (CDAB default), S7 MB_SERVER uses ABCD word order by default because Siemens native CPU types are big-endian top-to-bottom both within the register pair and byte pair. This profile exists so the driver's S7 profile default ByteOrder.BigEndian can be validated end-to-end. pymodbus bit-address semantics are the same as dl205.json (FC01/02/05/15 address X maps to cell index X/16); seed bits at the appropriate cell-indexed positions.",

  "server_list": {
    "srv": {
      "comm": "tcp",
      "host": "0.0.0.0",
      "port": 5020,
      "framer": "socket",
      "device_id": 1
    }
  },

  "device_list": {
    "dev": {
      "setup": {
        "co size":    4096,
        "di size":    4096,
        "hr size":    4096,
        "ir size":    1024,
        "shared blocks": true,
        "type exception": false,
        "defaults": {
          "value":  {"bits": 0, "uint16": 0, "uint32": 0, "float32": 0.0, "string": " "},
          "action": {"bits": null, "uint16": null, "uint32": null, "float32": null, "string": null}
        }
      },
      "invalid": [],
      "write": [
        [0, 0],
        [25, 25],
        [100, 101],
        [200, 209],
        [300, 301]
      ],

      "uint16": [
        {"_quirk": "DB1 header marker. On an S7-1500 with MB_SERVER pointing at DB1, operators often reserve DB1.DBW0 for a fingerprint word so clients can verify they're talking to the right DB. 0xABCD = 43981.",
         "addr": 0, "value": 43981},

        {"_quirk": "Scratch HR range 200..209 -- mirrors the standard.json scratch range so the smoke test (S7_1500Profile.SmokeHoldingRegister=200) round-trips identically against either profile.",
         "addr": 200, "value": 0},
        {"addr": 201, "value": 0},
        {"addr": 202, "value": 0},
        {"addr": 203, "value": 0},
        {"addr": 204, "value": 0},
        {"addr": 205, "value": 0},
        {"addr": 206, "value": 0},
        {"addr": 207, "value": 0},
        {"addr": 208, "value": 0},
        {"addr": 209, "value": 0},

        {"_quirk": "Float32 1.5f in ABCD word order (Siemens big-endian default, OPPOSITE of DL260 CDAB). IEEE-754 1.5 = 0x3FC00000. ABCD = high word first: HR[100]=0x3FC0=16320, HR[101]=0x0000=0.",
         "addr": 100, "value": 16320},
        {"_quirk": "Float32 1.5f ABCD low word.",
         "addr": 101, "value": 0},

        {"_quirk": "Int32 0x12345678 in ABCD word order. HR[300]=0x1234=4660, HR[301]=0x5678=22136. Demonstrates the contrast with DL260 CDAB Int32 encoding.",
         "addr": 300, "value": 4660},
        {"addr": 301, "value": 22136}
      ],

      "bits": [
        {"_quirk": "Coil bank marker cell. S7 MB_SERVER doesn't fix coil addresses; this simulates a user-wired DB where coil 400 (=bit 0 of cell 25) represents a latched digital output. Cell 25 bit 0 = 1 proves the wire-format round-trip works for coils on S7 profile.",
         "addr": 25, "value": 1},

        {"_quirk": "Discrete-input bank marker cell. DI 500 (=bit 0 of cell 31) = 1. Like coils, discrete inputs on S7 MB_SERVER are per-site; we assert the end-to-end FC02 path only.",
         "addr": 31, "value": 1}
      ],

      "uint32":  [],
      "float32": [],
      "string":  [],
      "repeat":  []
    }
  }
}
